Soheil Khadir

Soheil Khadir

About Me.

P.h.D in computer science at Penn State University

I am Soheil Khadirsharbiyani, a fifth-year direct PhD candidate at Pennsylvania State University. My research interests center on the strategic integration of compiler techniques to optimize the functionality of quantum circuits, aiming to forefront advancements in this rapidly evolving discipline. Furthermore, my research extends to enhancing memory systems, with a concentrated effort to elevate their performance metrics.

Over the course of my study, I had the privilege of collaborating with industry leaders at Samsung Semiconductor Inc. and Panasas. This invaluable experience not only broadened my technical acumen but also culminated in the publication of a patent and a research paper, currently under submission.

I invite you to explore my CV for a comprehensive view of my academic and professional milestones.

 
 
 
 

Personal Information

  • Name Soheil Khadirsharbiyani
  • Age 26 Years
  • Address
    W209 Westgate Building,
    University Park, PA, 16802
  • Email
    soheilkhpsu -AT- psu -DOT- edu

My Resume

Work & Research

  • Ongoing August 2021

    Graduate Research Assistant

    Pennsylvania State University, PA

    I have initiated several ongoing projects focused on using quantum-specific compiler techniques, with the aim of improving reliability for NISQ (Noisy Intermediate-Scale Quantum) systems. My work in this area explores innovative solutions to enhance the reliability and performance of quantum circuits. Additionally, I have started a new project centered on the development of a cloud scheduler and distributor. This endeavor is designed to leverage the unique characteristics of various systems, with the goal of optimizing the performance of quantum circuits. These efforts collectively underline my commitment to pushing the boundaries in quantum computing and cloud-based solutions.

  • August 2021 May 2021

    Software Architect Intern

    Samsung Semiconductor Inc, CA (Remote Internship)

    I collaborated with the SmartSSD group to develop applications specifically designed for near-disk processing systems, a field of technology that is gaining prominence for its efficiency and capabilities. My role not only involved the technical development but also required a meticulous analysis of database processing units. I conducted extensive research and performance evaluations to identify the optimal execution strategy between SmartSSD and host systems.

  • May 2021 August 2020

    Graduate Research Assistant

    Pennsylvania State University, PA

    During this semester, I worked on our first quantum paper, TRIM, which focuses on a mapping technique to eliminate crosstalk errors in quantum circuits. This work was published in IEEE QSW 2023. Along with this, I initiated several other compiler-based projects targeting under-development quantum hardware. Additionally, I collaborated on two distinct projects: Athena, which was published in PACT 2022, and MBFGraph, published in SC 2023.

  • August 2020 May 2020

    Software Architect Intern

    Samsung Semiconductor Inc, CA (Remote Internship)

    I developed a graph processing framework specifically tailored to enhance algorithm performance on systems utilizing FPGA and SSD technologies, including Smart SSD. This project involved not only the intricate work of system optimization but also groundbreaking collaboration on the creation of a novel partitioning technique. Furthermore, I helped design a new framework aimed at leveraging near-memory processing on systems with limited DRAM, effectively maximizing performance under constrained resources. This approach culminated in the filing of a patent for the proposal, and the results were published internationally.

  • May 2020 August 2019

    Graduate Research & Teaching Assistant

    Pennsylvania State University, PA

    During the spring semester, I was serving as a teaching assistant for the graduate course in Compiler Construction, I was responsible for designing student projects and assisting with their implementation. Concurrently, I conducted research on 3D DRAM, focusing on a developement of our proposal known as Data Convection. This technique organizes data within DRAM based on its usage across different layers. My work in this area was recognized, leading to a publication in the conference proceedings of PACT 2022.

  • August 2019 May 2019

    Software Engineer Intern

    Panasas, PA

    I worked on updating the Robinhood Policy Engine to ensure compatibility with Panasas file systems, a critical step in enhancing system integration. In addition, I integrated Panasas changelogs into Robinhood and optimized the existing code. This optimization led to a significant improvement in the performance of file system operations, with efficiency gains of up to 90%.

  • May 2019 August 2018

    Teaching Assistant

    Pennsylvania State University, PA

    Served as a Teaching Assistant for COMPEN 331, an introductory course to computer architecture. Responsibilities included holding office hours to assist students, as well as designing and creating homework and projects to enhance understanding of the subject matter.

EDUCATION

  • 2024 2018

    MS and Ph.D., Computer Science and Engineering

    Pennsylvania State University, PA
    GPA: 3.91 out of 4.00

    I am currently pursuing my Ph.D. under the esteemed guidance of Prof. Mahmut Taylan Kandemir. My academic journey began with an intensive focus on 3D DRAM, exploring methods to distribute data to enhance the performance of memory-intensive applications. After two years of in-depth research in this area, I shifted my focus towards the burgeoning field of quantum computing systems. Here, my research is centered on devising innovative compiler techniques to improve the reliability of quantum circuits in under-development quantum systems. Details of my published papers and ongoing research endeavors can be found in the Publications tab.

  • 2018 2013

    B.Sc., Electrical Engineering (Digital Systems)

    Sharif University of Technology, Iran
    GPA: 3.32 out of 4.00

    During my thesis project, I contributed to the implementation of various Convolutional Neural Networks such as GoogleNet, SqueezeNet, and AlexNet on ASIC/FPGA-based systems. This involved successfully implementing all the required modules and executing the complete system on an FPGA, showcasing the integration and functionality of neural network models on specialized hardware platforms.

Software & Platforms

  • Qiskit
  • gem5
  • DynamoRIO
  • GPGPUsim
  • GPUWattch
  • Hotspot
  • Ramulator
  • Robinhood

CODING SKILLS

C

90%

C++

70%

JAVA

60%

Verilog And SystemVerilog

85%

CUDA

70%

Contact me.

Please don't hesitate to get in touch, whether through the messaging feature or directly via email.

    soheilkhadir -AT- psu -DOT- edu
    University Park, USA